Ultra-low-latency trading fabrics

In high-frequency trading, the network is the strategy. We build tick-to-trade paths where every component is chosen for deterministic latency: Layer 1 cross-point switches that forward in single-digit nanoseconds, FPGA SmartNICs that handle market data in hardware, and kernel-bypass transports that take the operating system off the critical path.

Arista 7130 and Cisco Nexus 3550 platforms anchor the fabric. Layer 1 switching on Arista MetaConnect and the Nexus 3550-H forwards port to port in roughly 3 to 5 nanoseconds, and programmable muxing aggregates feeds in the high tens of nanoseconds. On the host, AMD Solarflare adapters running Onload, TCPDirect, and ef_vi, alongside AMD Alveo X3522 FPGA NICs, move packets straight to the application and bypass the kernel entirely.

Deterministic timing and compliance

At trading speed, time itself is infrastructure. We deploy GNSS-disciplined PTP grandmasters and IEEE 1588v2 hardware timestamping that hold sub-microsecond accuracy across the fabric, and White Rabbit where sub-nanosecond synchronization is required.

Precise time is also a regulatory obligation. We engineer clock distribution that satisfies MiFID II RTS 25, which requires high-frequency activity to stay within 100 microseconds of UTC at microsecond granularity, and the FINRA Consolidated Audit Trail, which requires business clocks within 50 milliseconds of NIST. The same timestamps that win a race also prove best execution.

• GNSS-disciplined PTP grandmaster clocks with UTC traceability
• IEEE 1588v2 PTP with NIC hardware timestamping
• White Rabbit for sub-nanosecond synchronization
• MiFID II RTS 25 timestamp accuracy for high-frequency activity
• FINRA Consolidated Audit Trail clock synchronization
• Auditable, traceable timestamps across the trade lifecycle

Latency between venues

The fastest path between two exchanges is rarely fiber. Light travels roughly fifty percent faster through air than through glass, so for the most competitive routes we design hybrid networks that run microwave and millimeter-wave as the primary path with fiber as backup. Carrier-grade microwave covers Aurora to Carteret in under four milliseconds one way, well inside the fiber figure.

Where line-of-sight microwave cannot reach, shortwave radio carries small, time-critical signals across oceans, and hollow-core fiber, which guides light through an air core rather than solid glass, is moving from pilot into production and cuts propagation delay further. We engineer the full route: path planning, redundancy, automatic failover, and continuous monitoring to prove which link is fastest at any moment.

AI and HPC data center fabrics

Training a frontier model is a networking problem. When tens of thousands of GPUs exchange gradients on every step, the fabric, not the accelerator, sets the ceiling on scale. We design the interconnect end to end, from the GPU scale-up domain inside the rack to the scale-out fabric across the cluster.

Inside the rack, NVIDIA NVLink 5 and NVSwitch build all-to-all GPU domains, and a GB200 NVL72 links 72 Blackwell GPUs into a single 130 terabyte-per-second domain. Across the cluster, we build NVIDIA Quantum InfiniBand at NDR 400 gigabit and XDR 800 gigabit per port, with ConnectX-8 SuperNICs, BlueField-3 DPUs, and SHARP in-network reduction that offloads collective operations onto the switch itself.

• NVLink 5 and NVSwitch GPU scale-up domains
• GB200 NVL72 racks as a single 130 TB/s NVLink domain
• NVIDIA Quantum InfiniBand at NDR 400G and XDR 800G
• ConnectX-8 SuperNICs and BlueField-3 DPUs
• SHARP in-network reduction for collective offload
• Rail-optimized fat-tree topologies for non-blocking scale-out

Lossless Ethernet at AI scale

Not every AI fabric is InfiniBand. For operators standardizing on Ethernet, we build lossless RoCEv2 fabrics on NVIDIA Spectrum-X and the Spectrum-4 SN5600 switch, and on Ultra Ethernet, the open standard whose 1.0 specification arrived in 2025 with a modern transport, multipath packet spraying, and congestion control designed for AI traffic.

The silicon is ready for it. We design spines on Broadcom Tomahawk 5 at 51.2 terabit and Tomahawk 6 at 102.4 terabit, Tomahawk Ultra for low-latency in-network collectives, Cisco Silicon One, and Arista Etherlink, tuned with PFC, ECN, DCQCN, and adaptive routing so the fabric stays lossless under collective load. We connect it with 800-gigabit and 1.6-terabit optics, linear-drive and co-packaged optics for power and latency, and 800ZR coherent links that stretch a cluster across sites, and we wire the data path with GPUDirect RDMA and GPUDirect Storage so data moves straight into GPU memory.

Proven in mission operations: NASA

NASA Mission Operations needed to port high-performance desktop software, originally written in C, onto tablet devices capable of displaying real-time telemetry and health data streamed from the International Space Station. The target was demanding: half a billion data points per second of ISS health and telemetry, processed and rendered on hardware with limited compute. NASA evaluated numerous solutions before selecting Modulus to build the system.

What we engineer

From the trading floor to the AI data center, our network engineers design and tune every layer that decides latency and throughput.